/*
 * Copyright (c) 2022, IMMORTA Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without modification,
 * are permitted provided that the following conditions are met:
 *
 * - Redistributions of source code must retain the above copyright notice, this list
 *   of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright notice, this
 *   list of conditions and the following disclaimer in the documentation and/or
 *   other materials provided with the distribution.
 *
 * - Neither the name of IMMORTA Inc. nor the names of its
 *   contributors may be used to endorse or promote products derived from this
 *   software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef SYSTEM_IM94_H
#define SYSTEM_IM94_H

/*!
 * @file system_IM94.h
 * @brief Device specific configuration file for IM94
 */

#include <stdint.h>

#ifdef __cplusplus
extern "C" {
#endif

/******************************************************************************
 * CPU Settings.
 *****************************************************************************/

/* Watchdog disable */
#ifndef DISABLE_WDOG
#define DISABLE_WDOG                    1
#endif

/* Cache disable */
#ifndef DISABLE_PCACHE
#define DISABLE_PCACHE                  1
#endif

/********************* Function safety ****************************************/
#define CONFIG_FUNCTION_SAFE                (0U)

#if (CONFIG_FUNCTION_SAFE == 1U)
#define CONFIG_VDD_REF POWER_VDD_REF_3V3
#ifndef CONFIG_VDD_REF
#error "CONFIG_VDD_REF Should be defined: POWER_VDD_REF_3V3 or POWER_VDD_REF_5V "
#endif
#endif

/* Value of the external crystal or oscillator clock frequency in Hz */
#ifndef CPU_XTAL_CLK_HZ
#define CPU_XTAL_CLK_HZ                 8000000u
#endif

/* Default System clock value */
#ifndef DEFAULT_SYSTEM_CLOCK
#define DEFAULT_SYSTEM_CLOCK            120000000u
#endif

/**
 * @brief System clock frequency (core clock)
 *
 * The system clock frequency supplied to the SysTick timer and the processor
 * core clock. This variable can be used by the user application to setup the
 * SysTick timer or configure other parameters. It may also be used by debugger to
 * query the frequency of the debug timer or configure the trace clock speed
 * g_systemCoreClock is initialized with a correct predefined value
 */
extern uint32_t g_systemCoreClock;

/*!
 * @brief System init,systemInit is called from startup_device file
 *
 * @param[in] None
 * @return None
 */
void SystemInit(void);

/*!
 * @brief Updates the g_systemCoreClock variable
 *
 * @param[in] None
 * @return None
 */
void SystemCoreClockUpdate(void);

/*!
 * @brief Suspend all interrupts
 *
 * @param[in] None
 * @return Interrupt mask
 */
uint32_t System_SuspendAllInterrupts(void);

/*!
 * @brief Resume all interrupts
 *
 * @param[in] ulMask: Intrrupt mask
 * @return None
 */
void System_ResumeAllInterrupts(volatile uint32_t ulMask);

#ifdef __cplusplus
}
#endif

#endif /* SYSTEM_IM94_H */

/*******EOF********************************************************************/
